Hot Carrier Design Considerations for MOS Devices and Circuits [electronic resource] / edited by Cheng Wang.
Erişim Adresi
ISBN
9781468485479
Dil Kodu
İngilizce
Yer Numarası
DK/16225
Basım Bildirimi
1st ed. 1992.
Yayın Bilgisi
New York, NY : Springer US : Imprint: Springer, 1992.
Fiziksel Niteleme
XVI, 334 p. 60 illus. online resource.
İçindekiler Notu
1 The Mechanisms of Hot Carrier Degradation -- 1.1 Introduction -- 1.2 Injection of Channel Hot Carriers in MOSFETs -- 1.3 Characterization Techniques -- 1.4 Charge Trapping and Dit-Generation Under Uniform Hot-Carrier Injection in MOSFETs -- 1.5 Charge Trapping and Dit-Generation Under Nonuniform Hot-Carrier Injection in MOSFETs -- 1.6 Conclusions -- 1.7 Acknowledgments -- References -- 2 Hot-Carrier Degradation Effects for DRAM Circuits -- 2.1 Introduction -- 2.2 Hot-Carrier Degradation in MOSFETs -- 2.3 Hot Carrier Impact on Circuit Operation -- 2.4 Circuit Hot-Electron Effect Simulation -- 2.5 ESD Latent Damage and Hot-Electron Reliability -- 2.6 Future Issues -- 2.7 Conclusions -- 2.8 Acknowledgments -- References -- 3 Hot Carrier Design Considerations in MOS Nonvolatile Memories -- 3.1 Introduction -- 3.2 Hot Carriers and EPROM -- 3.3 Hot Carriers and Flash Memory -- 3.4 Hot Carriers and Floating-Gate-Type EEPROMs -- 3.5 Hot Carriers and MNOS-Type EEPROMs -- 3.6 Conclusions -- 3.7 Acknowledgments -- References -- 4 Hot-Carrier Degradation During Dynamic Stress -- 4.1 The Problem of AC Hot-Carrier Degradation -- 4.2 Discussion of Transient Effects -- 4.3 Dynamic Degradation in Circuits -- 4.4 Conclusions -- References -- Appendices -- Appendix I On the Mathematical Formalism of the Hot-Carrier Currents in Semiconductor DevicesCheng T. Wang -- A1.1 Introduction -- A1.2 Mathematical Formalism -- A1.3 Conclusion -- References -- Appendix II Non-Local Field Effects on Carrier Transport in Ultra-Small-Size Devices Cheng T. Wang -- A2.1 Introduction -- A2.3 Drift Velocity as a Function of Distance -- A2.4 A Comparative Study of Field Effect on Drift Velocity -- A2.5 Conclusion -- A2.6 Acknowledgments -- References.
Özet, vb.
As device dimensions decrease, hot-carrier effects, which are due mainly to the presence of a high electric field inside the device, are becoming a major design concern. On the one hand, the detrimental effects-such as transconductance degradation and threshold shift-need to be minimized or, if possible, avoided altogether. On the other hand, performance such as the programming efficiency of nonvolatile memories or the carrier velocity inside the devices-need to be maintained or improved through the use of submicron technologies, even in the presence of a reduced power supply. As a result, one of the major challenges facing MOS design engineers today is to harness the hot-carrier effects so that, without sacrificing product performance, degradation can be kept to a minimum and a reli able design obtained. To accomplish this, the physical mechanisms re sponsible for the degradations should first be experimentally identified and characterized. With adequate models thus obtained, steps can be taken to optimize the design, so that an adequate level of quality assur ance in device or circuit performance can be achieved. This book ad dresses these hot-carrier design issues for MOS devices and circuits, and is used primarily as a professional guide for process development engi neers, device engineers, and circuit designers who are interested in the latest developments in hot-carrier degradation modeling and hot-carrier reliability design techniques. It may also be considered as a reference book for graduate students who have some research interests in this excit ing, yet sometime controversial, field.
Konu
Social sciences.
Humanities.
Humanities and Social Sciences.
Humanities.
Humanities and Social Sciences.
Diğer Yazarlar
Kurum Adı
Eseri Alıntıla
Referansları kullanmadan önce gözden geçirmeniz ve varsa gerekli düzeltmeleri yapmanız önerilir.
Dijital Kaynak
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250 |a1st ed. 1992.
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300 |aXVI, 334 p. 60 illus.|bonline resource.
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505 0 |a1 The Mechanisms of Hot Carrier Degradation -- 1.1 Introduction -- 1.2 Injection of Channel Hot Carriers in MOSFETs -- 1.3 Characterization Techniques -- 1.4 Charge Trapping and Dit-Generation Under Uniform Hot-Carrier Injection in MOSFETs -- 1.5 Charge Trapping and Dit-Generation Under Nonuniform Hot-Carrier Injection in MOSFETs -- 1.6 Conclusions -- 1.7 Acknowledgments -- References -- 2 Hot-Carrier Degradation Effects for DRAM Circuits -- 2.1 Introduction -- 2.2 Hot-Carrier Degradation in MOSFETs -- 2.3 Hot Carrier Impact on Circuit Operation -- 2.4 Circuit Hot-Electron Effect Simulation -- 2.5 ESD Latent Damage and Hot-Electron Reliability -- 2.6 Future Issues -- 2.7 Conclusions -- 2.8 Acknowledgments -- References -- 3 Hot Carrier Design Considerations in MOS Nonvolatile Memories -- 3.1 Introduction -- 3.2 Hot Carriers and EPROM -- 3.3 Hot Carriers and Flash Memory -- 3.4 Hot Carriers and Floating-Gate-Type EEPROMs -- 3.5 Hot Carriers and MNOS-Type EEPROMs -- 3.6 Conclusions -- 3.7 Acknowledgments -- References -- 4 Hot-Carrier Degradation During Dynamic Stress -- 4.1 The Problem of AC Hot-Carrier Degradation -- 4.2 Discussion of Transient Effects -- 4.3 Dynamic Degradation in Circuits -- 4.4 Conclusions -- References -- Appendices -- Appendix I On the Mathematical Formalism of the Hot-Carrier Currents in Semiconductor DevicesCheng T. Wang -- A1.1 Introduction -- A1.2 Mathematical Formalism -- A1.3 Conclusion -- References -- Appendix II Non-Local Field Effects on Carrier Transport in Ultra-Small-Size Devices Cheng T. Wang -- A2.1 Introduction -- A2.3 Drift Velocity as a Function of Distance -- A2.4 A Comparative Study of Field Effect on Drift Velocity -- A2.5 Conclusion -- A2.6 Acknowledgments -- References.
520 |aAs device dimensions decrease, hot-carrier effects, which are due mainly to the presence of a high electric field inside the device, are becoming a major design concern. On the one hand, the detrimental effects-such as transconductance degradation and threshold shift-need to be minimized or, if possible, avoided altogether. On the other hand, performance such as the programming efficiency of nonvolatile memories or the carrier velocity inside the devices-need to be maintained or improved through the use of submicron technologies, even in the presence of a reduced power supply. As a result, one of the major challenges facing MOS design engineers today is to harness the hot-carrier effects so that, without sacrificing product performance, degradation can be kept to a minimum and a reli able design obtained. To accomplish this, the physical mechanisms re sponsible for the degradations should first be experimentally identified and characterized. With adequate models thus obtained, steps can be taken to optimize the design, so that an adequate level of quality assur ance in device or circuit performance can be achieved. This book ad dresses these hot-carrier design issues for MOS devices and circuits, and is used primarily as a professional guide for process development engi neers, device engineers, and circuit designers who are interested in the latest developments in hot-carrier degradation modeling and hot-carrier reliability design techniques. It may also be considered as a reference book for graduate students who have some research interests in this excit ing, yet sometime controversial, field.
532 8 |aAccessibility summary: This PDF is not accessible. It is based on scanned pages and does not support features such as screen reader compatibility or described non-text content (images, graphs etc). However, it likely supports searchable and selectable text based on OCR (Optical Character Recognition). Users with accessibility needs may not be able to use this content effectively. Please contact us at accessibilitysupport@springernature.com if you require assistance or an alternative format.
532 8 |aInaccessible, or known limited accessibility
532 8 |aNo reading system accessibility options actively disabled
532 8 |aPublisher contact for further accessibility information: accessibilitysupport@springernature.com
650 0|aSocial sciences.
650 0|aHumanities.
650 14|aHumanities and Social Sciences.
700 1 |aWang, Cheng.|eeditor.|4edt|4http://id.loc.gov/vocabulary/relators/edt
710 2 |aSpringerLink (Online service)
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776 08|iPrinted edition:|z9781468485493
856 40|uhttps://doi.org/10.1007/978-1-4684-8547-9
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912 |aZDB-2-SXH
912 |aZDB-2-BAE
950 |aHumanities, Social Sciences and Law (SpringerNature-11648)
950 |aHistory (R0) (SpringerNature-43722)
001 814988
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020 |a9781468485479|9978-1-4684-8547-9
024 7 |a10.1007/978-1-4684-8547-9|2doi
041 |aeng
049 |aTürk Tarih Kurumu Kütüphanesi
050 4|aH1-99
050 4|aAZ19.2-999
072 7|aGT|2bicssc
072 7|aNON000000|2bisacsh
072 7|aGT|2thema
082 04|a300|223
082 04|a001.3|223
090 |aDK/16225
245 10|aHot Carrier Design Considerations for MOS Devices and Circuits|h[electronic resource] /|cedited by Cheng Wang.
250 |a1st ed. 1992.
264 1|aNew York, NY :|bSpringer US :|bImprint: Springer,|c1992.
300 |aXVI, 334 p. 60 illus.|bonline resource.
336 |atext|btxt|2rdacontent
337 |acomputer|bc|2rdamedia
338 |aonline resource|bcr|2rdacarrier
347 |atext file|bPDF|2rda
505 0 |a1 The Mechanisms of Hot Carrier Degradation -- 1.1 Introduction -- 1.2 Injection of Channel Hot Carriers in MOSFETs -- 1.3 Characterization Techniques -- 1.4 Charge Trapping and Dit-Generation Under Uniform Hot-Carrier Injection in MOSFETs -- 1.5 Charge Trapping and Dit-Generation Under Nonuniform Hot-Carrier Injection in MOSFETs -- 1.6 Conclusions -- 1.7 Acknowledgments -- References -- 2 Hot-Carrier Degradation Effects for DRAM Circuits -- 2.1 Introduction -- 2.2 Hot-Carrier Degradation in MOSFETs -- 2.3 Hot Carrier Impact on Circuit Operation -- 2.4 Circuit Hot-Electron Effect Simulation -- 2.5 ESD Latent Damage and Hot-Electron Reliability -- 2.6 Future Issues -- 2.7 Conclusions -- 2.8 Acknowledgments -- References -- 3 Hot Carrier Design Considerations in MOS Nonvolatile Memories -- 3.1 Introduction -- 3.2 Hot Carriers and EPROM -- 3.3 Hot Carriers and Flash Memory -- 3.4 Hot Carriers and Floating-Gate-Type EEPROMs -- 3.5 Hot Carriers and MNOS-Type EEPROMs -- 3.6 Conclusions -- 3.7 Acknowledgments -- References -- 4 Hot-Carrier Degradation During Dynamic Stress -- 4.1 The Problem of AC Hot-Carrier Degradation -- 4.2 Discussion of Transient Effects -- 4.3 Dynamic Degradation in Circuits -- 4.4 Conclusions -- References -- Appendices -- Appendix I On the Mathematical Formalism of the Hot-Carrier Currents in Semiconductor DevicesCheng T. Wang -- A1.1 Introduction -- A1.2 Mathematical Formalism -- A1.3 Conclusion -- References -- Appendix II Non-Local Field Effects on Carrier Transport in Ultra-Small-Size Devices Cheng T. Wang -- A2.1 Introduction -- A2.3 Drift Velocity as a Function of Distance -- A2.4 A Comparative Study of Field Effect on Drift Velocity -- A2.5 Conclusion -- A2.6 Acknowledgments -- References.
520 |aAs device dimensions decrease, hot-carrier effects, which are due mainly to the presence of a high electric field inside the device, are becoming a major design concern. On the one hand, the detrimental effects-such as transconductance degradation and threshold shift-need to be minimized or, if possible, avoided altogether. On the other hand, performance such as the programming efficiency of nonvolatile memories or the carrier velocity inside the devices-need to be maintained or improved through the use of submicron technologies, even in the presence of a reduced power supply. As a result, one of the major challenges facing MOS design engineers today is to harness the hot-carrier effects so that, without sacrificing product performance, degradation can be kept to a minimum and a reli able design obtained. To accomplish this, the physical mechanisms re sponsible for the degradations should first be experimentally identified and characterized. With adequate models thus obtained, steps can be taken to optimize the design, so that an adequate level of quality assur ance in device or circuit performance can be achieved. This book ad dresses these hot-carrier design issues for MOS devices and circuits, and is used primarily as a professional guide for process development engi neers, device engineers, and circuit designers who are interested in the latest developments in hot-carrier degradation modeling and hot-carrier reliability design techniques. It may also be considered as a reference book for graduate students who have some research interests in this excit ing, yet sometime controversial, field.
532 8 |aAccessibility summary: This PDF is not accessible. It is based on scanned pages and does not support features such as screen reader compatibility or described non-text content (images, graphs etc). However, it likely supports searchable and selectable text based on OCR (Optical Character Recognition). Users with accessibility needs may not be able to use this content effectively. Please contact us at accessibilitysupport@springernature.com if you require assistance or an alternative format.
532 8 |aInaccessible, or known limited accessibility
532 8 |aNo reading system accessibility options actively disabled
532 8 |aPublisher contact for further accessibility information: accessibilitysupport@springernature.com
650 0|aSocial sciences.
650 0|aHumanities.
650 14|aHumanities and Social Sciences.
700 1 |aWang, Cheng.|eeditor.|4edt|4http://id.loc.gov/vocabulary/relators/edt
710 2 |aSpringerLink (Online service)
773 0 |tSpringer Nature eBook
776 08|iPrinted edition:|z9780442001216
776 08|iPrinted edition:|z9781468485486
776 08|iPrinted edition:|z9781468485493
856 40|uhttps://doi.org/10.1007/978-1-4684-8547-9
912 |aZDB-2-SHU
912 |aZDB-2-SXH
912 |aZDB-2-BAE
950 |aHumanities, Social Sciences and Law (SpringerNature-11648)
950 |aHistory (R0) (SpringerNature-43722)
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